1. Field of the Invention
The present invention relates to processors. In one example, the present invention relates to improving mechanisms and techniques for implementing custom instructions associated with a processor.
2. Description of the Prior Art
A number of benefits have spurred efforts towards developing programmable chips having both logic elements and a processor core. In one example, integrating processor cores with logic elements on a single programmable chip allows efficient and effective processing using a variety of different logic mechanisms and functions. In one example, programmable chips are provided with not only logic elements and memory, but with processor cores and other components as well. Integrating processor cores and other components onto a programmable chip allows designers to more efficiently implement descriptions on programmable devices by allowing some functions to be performed by a processor core and other functions to be performed using logic elements.
The processor on the programmable device has an instruction set allowing software implementation of certain operations using the instructions in the instruction set. Other components on the programmable device implemented using logic elements may be invoked as hardware operations. In certain instances, it is desirable to customize an instruction set to allow software implementation of selected operations in a more efficient manner. For example, it may be desirable to include a 40-bit multiply in the instruction set of a 32-bit processor. Although a 40-bit multiply could be performed using a sequence of standard 32-bit instructions, it may be less efficient than implementing a custom instruction for performing a 40-bit multiply.
However, mechanisms and techniques for integrating custom instructions into the instruction set of a processor are limited. It is therefore desirable to provide improved methods and apparatus for optimizing implementation of customizable processor cores on programmable chips.